A new approach for the multiple fault location in linear analog circuits is proposed. It presents the characteristic of using classical numerical procedures together with symbolic analysis techniques, which is particularly useful in the parametric fault diagnosis field. The proposed approach is based on the k-fault hypothesis and is provided with efficient algorithms for fault location also in the case of low testability circuits. The developed algorithms have been used for realizing a software package prototype which implements a fully automated system for the fault location in linear analog circuits of moderate size.

On the application of symbolic techniques to the multiple fault location in low testability analog circuits / FEDI G.; GIOMI R.; LUCHETTA A.; S. MANETTI; PICCIRILLI M.C.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING. - ISSN 1057-7130. - STAMPA. - 45, no. 10:(1998), pp. 1383-1388. [10.1109/82.728851]

On the application of symbolic techniques to the multiple fault location in low testability analog circuits

LUCHETTA, ANTONIO;MANETTI, STEFANO;PICCIRILLI, MARIA CRISTINA
1998

Abstract

A new approach for the multiple fault location in linear analog circuits is proposed. It presents the characteristic of using classical numerical procedures together with symbolic analysis techniques, which is particularly useful in the parametric fault diagnosis field. The proposed approach is based on the k-fault hypothesis and is provided with efficient algorithms for fault location also in the case of low testability circuits. The developed algorithms have been used for realizing a software package prototype which implements a fully automated system for the fault location in linear analog circuits of moderate size.
1998
45, no. 10
1383
1388
FEDI G.; GIOMI R.; LUCHETTA A.; S. MANETTI; PICCIRILLI M.C.
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Utilizza questo identificatore per citare o creare un link a questa risorsa: https://hdl.handle.net/2158/215343
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