An efficient high-speed packet switching with shared input buffers

An efficient high-speed packet switching in which each packet arrived at an input is stored in one of N possible queues, one for each possible output link, is discussed. An implementation architecture which makes it possible for the N separate queues to share the same input buffer is considered. An important result is that the proposed multiple input queueing approach outperforms the output queueing approach without requiring a speedup in the switching operations.