A novel integrated implementation of a high step-down multiphase buck for low voltage power supply is presented. The design and test chip measurements of a [10.8, 16]V to [0.65, 2]V, 2A, 10 MHz, 25.6 mW/mm2, four-phases single-chip solution are presented with considerations on architecture, passive components, problems related to high frequency integration and relative improvements on power density. The experimental results confirm the theoretical predictions by simulations and are compared with respect to previous discrete implementations and integrated topologies focusing on high step-down conversion and output power. So-called “high step-down multiphase buck” topologies present advantages in terms of extended duty cycle, reduced passive components’ size and reduced switches’ breakdown voltages. However, these topologies require a more complex gate drive structure for their high side switches which are working each on a different voltage domain. A novel drive architecture that eliminates the need of any external auxiliary voltage source, being directly supplied on fractions of the input voltage, is proposed. This architecture provides also a recycling of the gate charge at the turn-off of the switches. Another problem addressed is the start up of the converter, which requires a proper pre-charging of the topology’s flying capacitors. Power stage measured waveforms show the correct start-up and steady-state operation of the proposed converter design.
"Integrated High Step-down Multiphase Buck Converter with High Power Density" / Calabrese, Giacomo; Granato, Maurizio; Frattini, Giovanni; Capineri, Lorenzo. - In: MICROELECTRONICS JOURNAL. - ISSN 0959-8324. - ELETTRONICO. - 56:(2016), pp. 97-109. [10.1016/j.mejo.2016.08.009]
"Integrated High Step-down Multiphase Buck Converter with High Power Density"
CALABRESE, GIACOMO;CAPINERI, LORENZO
2016
Abstract
A novel integrated implementation of a high step-down multiphase buck for low voltage power supply is presented. The design and test chip measurements of a [10.8, 16]V to [0.65, 2]V, 2A, 10 MHz, 25.6 mW/mm2, four-phases single-chip solution are presented with considerations on architecture, passive components, problems related to high frequency integration and relative improvements on power density. The experimental results confirm the theoretical predictions by simulations and are compared with respect to previous discrete implementations and integrated topologies focusing on high step-down conversion and output power. So-called “high step-down multiphase buck” topologies present advantages in terms of extended duty cycle, reduced passive components’ size and reduced switches’ breakdown voltages. However, these topologies require a more complex gate drive structure for their high side switches which are working each on a different voltage domain. A novel drive architecture that eliminates the need of any external auxiliary voltage source, being directly supplied on fractions of the input voltage, is proposed. This architecture provides also a recycling of the gate charge at the turn-off of the switches. Another problem addressed is the start up of the converter, which requires a proper pre-charging of the topology’s flying capacitors. Power stage measured waveforms show the correct start-up and steady-state operation of the proposed converter design.File | Dimensione | Formato | |
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