Sizing CMOS operational transconductance amplifiers applying NSGA-II and MOEAD

Sizing analog integrated circuits (ICs) is a challenge due to the many trade-offs among their target specifications. For example, it has been shown that the operational transconductance amplifier (OTA) has a huge plethora of applications in analog electronic circuits. It can be designed using complementary metal-oxide-semiconductor (CMOS) IC technology. However, as CMOS technology scales down to the nanometer regime, many design problems arise to accomplish target specifications, and this task become impossible to mitigate when performing traditional manual design. In this manner, this article shows the usefulness of applying multi-objective optimization to size CMOS OTAs. NSGA-II and MOEAD are well-known evolutionary algorithms that can be applied to optimize CMOS ICs, and they are applied herein using CMOS technology of 350 nanometers. Both optimizers are tested using four indicators, namely: hypervolume, Δ p , spacing and coverage. It is highlighted that NSGA-II is better than MOEAD, and it generates feasible solutions providing gains higher than 80dB and bandwidths in the range of MHz.