In this work, a method is presented to predict the radiofrequency impedance of a practical implementation of a bypass network. Circuit models of both ceramic and electrolytic capacitors are introduced, whose parameters are derived from manufacturers’ specifications. Mounting inductance of capacitors is accounted for through estimates of vias and microstrips inductance. Predictions are confirmed by vector network analyzer (VNA) measurements through an incremental process of comparisons in which the number of parallel capacitances of the bypass network is progressively increased. A simple technique to remove the residual (after VNA calibration) series inductance introduced by the radiofrequency connectors used to connect the VNA ports to the printed circuit board hosting the bypass network is presented. An insight into the low-frequency behavior of ceramic capacitors of large capacitance (in the tens of microfarad range) is also offered. Measurements confirm the reliability of the lumped circuit model of the bypass network up to about 400 MHz for a printed circuit board (PCB) sized 15 cm x 11.3 cm. Above this frequency distributed phenomena and radiation cause measurements to significantly deviate from predictions. The bypass network impedance behavior is essentially described, up to the frequency limit of validity of the lumped model, by a simple but effective series circuit consisting in a large capacitance of the order of 1 mF , an inductance of the order of 0.07 nH and a resistance of the order of 0.5 mohm.

Lumped Circuit Model and VNA Measurement of the RF Impedance of a Bypass Network / Sordi, Federico; Capineri, Lorenzo; Carobbi, Carlo. - ELETTRONICO. - (2021), pp. 196-201. (Intervento presentato al convegno 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium) [10.1109/EMC/SI/PI/EMCEurope52599.2021.9559217].

Lumped Circuit Model and VNA Measurement of the RF Impedance of a Bypass Network

Sordi, Federico
Investigation
;
Capineri, Lorenzo
Supervision
;
Carobbi, Carlo
Supervision
2021

Abstract

In this work, a method is presented to predict the radiofrequency impedance of a practical implementation of a bypass network. Circuit models of both ceramic and electrolytic capacitors are introduced, whose parameters are derived from manufacturers’ specifications. Mounting inductance of capacitors is accounted for through estimates of vias and microstrips inductance. Predictions are confirmed by vector network analyzer (VNA) measurements through an incremental process of comparisons in which the number of parallel capacitances of the bypass network is progressively increased. A simple technique to remove the residual (after VNA calibration) series inductance introduced by the radiofrequency connectors used to connect the VNA ports to the printed circuit board hosting the bypass network is presented. An insight into the low-frequency behavior of ceramic capacitors of large capacitance (in the tens of microfarad range) is also offered. Measurements confirm the reliability of the lumped circuit model of the bypass network up to about 400 MHz for a printed circuit board (PCB) sized 15 cm x 11.3 cm. Above this frequency distributed phenomena and radiation cause measurements to significantly deviate from predictions. The bypass network impedance behavior is essentially described, up to the frequency limit of validity of the lumped model, by a simple but effective series circuit consisting in a large capacitance of the order of 1 mF , an inductance of the order of 0.07 nH and a resistance of the order of 0.5 mohm.
2021
2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium
2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium
Sordi, Federico; Capineri, Lorenzo; Carobbi, Carlo
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Utilizza questo identificatore per citare o creare un link a questa risorsa: https://hdl.handle.net/2158/1245989
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