A method is presented to test the immunity of mixed signal (digital and analog) electronics to power supply disturbances in the frequency range between 10 kHz and 5 MHz, as those originating from switched mode power supplies. An example of application of the method to a Serializer/Deserializer (SerDes) integrated circuit is illustrated. For these electronic devices the power supply noise can critically affect performance. The SerDes is hosted by an evaluation board supplied by an external Power Module. An ad-hoc disturbance source and Coupling/Decoupling Network (CDN) have been designed to couple a disturbance of significant amplitude to the power supply of the evaluation board while decoupling it from the Power Module. The radiofrequency (RF) impedance of the bypass network of the evaluation board has been considered for the design of both the disturbance source and the CDN. Details about the architecture and operation of the high-current, broadband and linear power amplifier used for disturbance generation are provided, along with component selection and verification of the CDN. The practical implementation of the test, including a feedback control loop capable of generating the specified disturbance level over the frequency range of interest, is described. Finally, test results are reported in terms of the SerDes bit error rate (BER) degradation as a function of disturbance amplitude and frequency.

Immunity testing of mixed signal electronics against power supply disturbances in the frequency range from 10 kHz to 5 MHz / Sordi, Federico; Vignoli, Leonardo; Capineri, Lorenzo; Carobbi, Carlo. - In: IEEE TRANSACTIONS ON SIGNAL AND POWER INTEGRITY. - ISSN 2768-1866. - STAMPA. - 1:(2022), pp. 170-178. [10.1109/TSIPI.2022.3225511]

Immunity testing of mixed signal electronics against power supply disturbances in the frequency range from 10 kHz to 5 MHz

Sordi, Federico
Investigation
;
Capineri, Lorenzo
Writing – Review & Editing
;
Carobbi, Carlo
Writing – Original Draft Preparation
2022

Abstract

A method is presented to test the immunity of mixed signal (digital and analog) electronics to power supply disturbances in the frequency range between 10 kHz and 5 MHz, as those originating from switched mode power supplies. An example of application of the method to a Serializer/Deserializer (SerDes) integrated circuit is illustrated. For these electronic devices the power supply noise can critically affect performance. The SerDes is hosted by an evaluation board supplied by an external Power Module. An ad-hoc disturbance source and Coupling/Decoupling Network (CDN) have been designed to couple a disturbance of significant amplitude to the power supply of the evaluation board while decoupling it from the Power Module. The radiofrequency (RF) impedance of the bypass network of the evaluation board has been considered for the design of both the disturbance source and the CDN. Details about the architecture and operation of the high-current, broadband and linear power amplifier used for disturbance generation are provided, along with component selection and verification of the CDN. The practical implementation of the test, including a feedback control loop capable of generating the specified disturbance level over the frequency range of interest, is described. Finally, test results are reported in terms of the SerDes bit error rate (BER) degradation as a function of disturbance amplitude and frequency.
2022
1
170
178
Sordi, Federico; Vignoli, Leonardo; Capineri, Lorenzo; Carobbi, Carlo
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Utilizza questo identificatore per citare o creare un link a questa risorsa: https://hdl.handle.net/2158/1292562
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