Among the several new applications that Visible Light Communication (VLC) have made possible in recent years, board-to-board (B2B) communication represents an important field of employment for this technology. Most of the systems that would benefit from VLC-based B2B communication are digital boards that include Field Programmable Gate Arrays (FPGAs) or advanced processors. Modern FPGA output buffers have limited power, but switch at hundreds of MHz: a much higher rate compared to that of the typical single MOSFET employed in a ON-Off Key (OOK) transmitter. This letter explores the possibility of exploiting the FGPA buffers for realizing a OOK transmitter suitable for B2B communication. A transmitter circuit, driving a 70 mA LED, is proposed and characterized for 26 different electrical standards and configurations of the FPGA buffer. A 210 Mb/s link was demonstrated at a distance of 6 cm (120 Mb/s at 24 cm) with a Bit Error Rate (BER) < 1.5 · 10 -6 (95% confidence).
Transmitter for Visible Light Communications based on FPGA’s Output Buffers / Ricci, Stefano; Caputo, Stefano. - In: IEEE COMMUNICATIONS LETTERS. - ISSN 1089-7798. - ELETTRONICO. - 28:(2024), pp. -.2116--.2120. [10.1109/lcomm.2024.3430393]
Transmitter for Visible Light Communications based on FPGA’s Output Buffers
Ricci, Stefano
;Caputo, Stefano
2024
Abstract
Among the several new applications that Visible Light Communication (VLC) have made possible in recent years, board-to-board (B2B) communication represents an important field of employment for this technology. Most of the systems that would benefit from VLC-based B2B communication are digital boards that include Field Programmable Gate Arrays (FPGAs) or advanced processors. Modern FPGA output buffers have limited power, but switch at hundreds of MHz: a much higher rate compared to that of the typical single MOSFET employed in a ON-Off Key (OOK) transmitter. This letter explores the possibility of exploiting the FGPA buffers for realizing a OOK transmitter suitable for B2B communication. A transmitter circuit, driving a 70 mA LED, is proposed and characterized for 26 different electrical standards and configurations of the FPGA buffer. A 210 Mb/s link was demonstrated at a distance of 6 cm (120 Mb/s at 24 cm) with a Bit Error Rate (BER) < 1.5 · 10 -6 (95% confidence).I documenti in FLORE sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.