Photonics offers a promising platform for quantum computing1, 2, 3–4, owing to the availability of chip integration for mass-manufacturable modules, fibre optics for networking and room-temperature operation of most components. However, experimental demonstrations are needed of complete integrated systems comprising all basic functionalities for universal and fault-tolerant operation5. Here we construct a (sub-performant) scale model of a quantum computer using 35 photonic chips to demonstrate its functionality and feasibility. This combines all the primitive components as discrete, scalable rack-deployed modules networked over fibre-optic interconnects, including 84 squeezers6 and 36 photon-number-resolving detectors furnishing 12 physical qubit modes at each clock cycle. We use this machine, which we name Aurora, to synthesize a cluster state7 entangled across separate chips with 86.4 billion modes, and demonstrate its capability of implementing the foliated distance-2 repetition code with real-time decoding. The key building blocks needed for universality and fault tolerance are demonstrated: heralded synthesis of single-temporal-mode non-Gaussian resource states, real-time multiplexing actuated on photon-number-resolving detection, spatiotemporal cluster-state formation with fibre buffers, and adaptive measurements implemented using chip-integrated homodyne detectors with real-time single-clock-cycle feedforward. We also present a detailed analysis of our architecture’s tolerances for optical loss, which is the dominant and most challenging hurdle to crossing the fault-tolerant threshold. This work lays out the path to cross the fault-tolerant threshold and scale photonic quantum computers to the point of addressing useful applications.
Scaling and networking a modular photonic quantum computer / Aghaee Rad, H.; Ainsworth, T.; Alexander, R. N.; Altieri, B.; Askarani, M. F.; Baby, R.; Banchi, L.; Baragiola, B. Q.; Bourassa, J. E.; Chadwick, R. S.; Charania, I.; Chen, H.; Collins, M. J.; Contu, P.; D'Arcy, N.; Dauphinais, G.; De Prins, R.; Deschenes, D.; Di Luch, I.; Duque, S.; Edke, P.; Fayer, S. E.; Ferracin, S.; Ferretti, H.; Gefaell, J.; Glancy, S.; González-Arciniegas, C.; Grainge, T.; Han, Z.; Hastrup, J.; Helt, L. G.; Hillmann, T.; Hundal, J.; Izumi, S.; Jaeken, T.; Jonas, M.; Kocsis, S.; Krasnokutska, I.; Larsen, M. V.; Laskowski, P.; Laudenbach, F.; Lavoie, J.; Li, M.; Lomonte, E.; Lopetegui, C. E.; Luey, B.; Lund, A. P.; Ma, C.; Madsen, L. S.; Mahler, D. H.; Mantilla Calderón, L.; Menotti, M.; Miatto, F. M.; Morrison, B.; Nadkarni, P. J.; Nakamura, T.; Neuhaus, L.; Niu, Z.; Noro, R.; Papirov, K.; Pesah, A.; Phillips, D. S.; Plick, W. N.; Rogalsky, T.; Rortais, F.; Sabines-Chesterking, J.; Safavi-Bayat, S.; Sazhaev, E.; Seymour, M.; Rezaei Shad, K.; Silverman, M.; Srinivasan, S. A.; Stephan, M.; Tang, Q. Y.; Tasker, J. F.; Teo, Y. S.; Then, R. B.; Tremblay, J. E.; Tzitrin, I.; Vaidya, V. D.; Vasmer, M.; Vernon, Z.; Villalobos, L. F. S. S. M.; Walshe, B. W.; Weil, R.; Xin, X.; Yan, X.; Yao, Y.; Zamani Abnili, M.; Zhang, Y.. - In: NATURE. - ISSN 0028-0836. - ELETTRONICO. - 638:(2025), pp. 2233.912-2233.919. [10.1038/s41586-024-08406-9]
Scaling and networking a modular photonic quantum computer
Banchi, L.;
2025
Abstract
Photonics offers a promising platform for quantum computing1, 2, 3–4, owing to the availability of chip integration for mass-manufacturable modules, fibre optics for networking and room-temperature operation of most components. However, experimental demonstrations are needed of complete integrated systems comprising all basic functionalities for universal and fault-tolerant operation5. Here we construct a (sub-performant) scale model of a quantum computer using 35 photonic chips to demonstrate its functionality and feasibility. This combines all the primitive components as discrete, scalable rack-deployed modules networked over fibre-optic interconnects, including 84 squeezers6 and 36 photon-number-resolving detectors furnishing 12 physical qubit modes at each clock cycle. We use this machine, which we name Aurora, to synthesize a cluster state7 entangled across separate chips with 86.4 billion modes, and demonstrate its capability of implementing the foliated distance-2 repetition code with real-time decoding. The key building blocks needed for universality and fault tolerance are demonstrated: heralded synthesis of single-temporal-mode non-Gaussian resource states, real-time multiplexing actuated on photon-number-resolving detection, spatiotemporal cluster-state formation with fibre buffers, and adaptive measurements implemented using chip-integrated homodyne detectors with real-time single-clock-cycle feedforward. We also present a detailed analysis of our architecture’s tolerances for optical loss, which is the dominant and most challenging hurdle to crossing the fault-tolerant threshold. This work lays out the path to cross the fault-tolerant threshold and scale photonic quantum computers to the point of addressing useful applications.I documenti in FLORE sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.



