This paper discusses a numerically efficient approach to identify complex ambiguity groups for the purpose of analog fault diagnosis in low-testability circuits. The approach presented uses a numerically efficient QR factorization technique applied to the testability matrix. Various ambiguity groups are identified. This helps to find unique solution of fault diagnosis equations or identifies which groups of components can be uniquely determined. This work extends results reported earlier in literature, where QR factorization was used in low-testability circuits, significantly increasing efficiency to determine ambiguity groups. A Matlab program that implements this method was integrated with a symbolic analysis program that generates test equations. The method is illustrated on two low-testability electronic circuits. Finally, method efficiency is tested on larger electronic circuits with several hundred tested parameters.
Finding Ambiguity Groups in Low Testability Analog Circuits / STARZYK J.; PANG J.; S. MANETTI; PICCIRILLI M.C.; FEDI G.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. FUNDAMENTAL THEORY AND APPLICATIONS. - ISSN 1057-7122. - STAMPA. - 47:(2000), pp. 1125-1137. [10.1109/81.873868]
Finding Ambiguity Groups in Low Testability Analog Circuits
MANETTI, STEFANO;PICCIRILLI, MARIA CRISTINA;
2000
Abstract
This paper discusses a numerically efficient approach to identify complex ambiguity groups for the purpose of analog fault diagnosis in low-testability circuits. The approach presented uses a numerically efficient QR factorization technique applied to the testability matrix. Various ambiguity groups are identified. This helps to find unique solution of fault diagnosis equations or identifies which groups of components can be uniquely determined. This work extends results reported earlier in literature, where QR factorization was used in low-testability circuits, significantly increasing efficiency to determine ambiguity groups. A Matlab program that implements this method was integrated with a symbolic analysis program that generates test equations. The method is illustrated on two low-testability electronic circuits. Finally, method efficiency is tested on larger electronic circuits with several hundred tested parameters.I documenti in FLORE sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.