A new digital implementation of a receiver for digital communications is presented. The receiver structure performs the integration of a maximum a posteriori probability (MAP) carrier and clock synchronisation with the maximum likelihood (ML) demodulation. It is shown that the key feature of the receiver structure is that the same hardware is able to perform both operations; thus the receiver implementation complexity is greatly reduced. This scheme can be adapted to different modulation techniques suitable for digital communications, such as QPSK-O-QPSK and MSK. As examples, the application to QPSK and MSK signals is considered, owing to the interest of these modulation schemes for satellite communications.