Tremendous enhancement of light-matter interaction in plasmonic-dielectric hybrid devices allows for non-linearities at the level of single emitters and few photons, such as single photon transistors. However, constructing integrated components for such devices is technologically extremely challenging. We tackle this task by lithographically fabricating an on-chip plasmonic waveguide-structure connected to far-field in-and out-coupling ports via low-loss dielectric waveguides. We precisely describe our lithographic approach and characterize the fabricated integrated chip. We find excellent agreement with rigorous numerical simulations. Based on these findings we perform a numerical optimization and calculate concrete numbers for a plasmonic single-photon transistor.

A realistic fabrication and design concept for quantum gates based on single emitters integrated in plasmonic-dielectric waveguide structures / Kewes G.; Schoengen M.; Neitzke O.; Lombardi P.; Schonfeld R.-S.; Mazzamuto G.; Schell A.W.; Probst J.; Wolters J.; Lochel B.; Toninelli C.; Benson O.. - In: SCIENTIFIC REPORTS. - ISSN 2045-2322. - ELETTRONICO. - 6:(2016), pp. 0-0. [10.1038/srep28877]

A realistic fabrication and design concept for quantum gates based on single emitters integrated in plasmonic-dielectric waveguide structures

Lombardi P.;Mazzamuto G.;
2016

Abstract

Tremendous enhancement of light-matter interaction in plasmonic-dielectric hybrid devices allows for non-linearities at the level of single emitters and few photons, such as single photon transistors. However, constructing integrated components for such devices is technologically extremely challenging. We tackle this task by lithographically fabricating an on-chip plasmonic waveguide-structure connected to far-field in-and out-coupling ports via low-loss dielectric waveguides. We precisely describe our lithographic approach and characterize the fabricated integrated chip. We find excellent agreement with rigorous numerical simulations. Based on these findings we perform a numerical optimization and calculate concrete numbers for a plasmonic single-photon transistor.
2016
6
0
0
Goal 9: Industry, Innovation, and Infrastructure
Kewes G.; Schoengen M.; Neitzke O.; Lombardi P.; Schonfeld R.-S.; Mazzamuto G.; Schell A.W.; Probst J.; Wolters J.; Lochel B.; Toninelli C.; Benson O.
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Utilizza questo identificatore per citare o creare un link a questa risorsa: https://hdl.handle.net/2158/1215887
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